This invention relates to a method of fabricating a printed circuit board.
A multilayer printed circuit board may be fabricated from multiple composite sheets, each comprising a substrate of dielectric material and a foil of metal, such as copper, adhered to one surface of the substrate. The foil of a first composite sheet is patterned to define conductor runs of a first conductor layer, and the second sheet is then bonded to the first sheet so that the first conductor layer is covered by the second sheet and the foil of the second sheet is away from the first sheet. The two sheets may be bonded together under heat and pressure by use of a dry film adhesive. Holes are drilled through the assembly of the first and second sheets, and metal is deposited in these through holes by an electroless plating operation. The foil of the second sheet is then patterned, so as to define conductor runs of a second conductor layer, and the metal in the through holes provides electrically-conductive connection between runs of the first conductor layer and runs of the second conductor layer. This operation may be repeated until a board having five or more conductive layers is formed.
In a modification of the process described above, the first sheet has a copper foil adhered to each side, and each of these foils is patterned to form respective inner conductor layers. The two conductor layers of the first sheet are covered by respective composite sheets and the foils of these sheets are patterned (after drilling and through-hole plating) to define respective conductor layers. In this way, a so-called double-sided board is obtained.
The techniques described above may be applied to the manufacture of both rigid circuit boards, having substrates of, e.g. epoxy glass, and flexible circuit boards, having substrates of, e.g. polyimide.
The density of conductor runs required in a circuit board may be different in different areas of the board. The number of conductor layers will normally be determined by the maximum density of conductor runs, and therefore there may be large areas of the board having more conductor layers than are needed to provide the required density of conductor runs in those areas.
It is known to form a blind via during fabrication of a circuit board by locally removing the foil of the second sheet and then removing the dielectric material of the second sheet, where it has been exposed by local removal of the foil of the second sheet, without penetrating the first sheet. Metal is electrolessly deposited into the resulting blind hole, and the foil of the second sheet is then patterned. See U.S. Pat. No. 4,642,160, issued Feb. 10, 1987 (Burgess). Attention is also directed to U.S. Pat. Nos. 4,664,130, issued Feb. 17, 1987 (Bachman), 4,030,190, issued June 21, 1977 (Varker) and 4,566,186, issued Jan. 28, 1986 (Bauer et al).